latch and Flip Flop
Rtl Design Engineer Interview Questions
272 rtl design engineer interview questions shared by candidates
Core subjects, digital electronics, cmos, verilog
another tough question was that you are given a small design, you are asked to tell how you test that logic. like how/what checkers to implement.
FIFO depth
nothing as such..everything was from what i had studied in BS and MS
What is fifo
What's hash? what's link list?
What's setup and hold time? How to solve the setup and hold violaton.
Low power implementation - UPF Level shifters, isolation cells, retention cells, clock gating, PoR sequence etc.
Explain and design a two level branch predictor
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