Basic RTL codes and degital design,fsm state digram(melay andMoore state machine).setup and hold time.latch and d flip flop.synchronous vs asynchronous fifo.syncronohs reset and asynchronous reset verilog code .static timing analysis
Design Rtl Interview Questions
274 design rtl interview questions shared by candidates
Questions covered computer architecture, timing problems, power analysis, and design problems
Describe clock domain crossing techniques
Self intro, basic definations in CTS and STA, low power design methodologies, local vs global skew, problems on sta
Async fifo design and SDC contraints for it. Pulse synchronizer cross clock domains.
Lots of questions on OoO processor and Caches Learn more than what is given in your coursework
ASIC design processes, techniques, design processes
Based in UVM and System verilog and project related questions
Asked me to draw a boolean expression using only NAND gates.
latch vs FF
Viewing 91 - 100 interview questions
See Interview Questions for Similar Jobs
Rtl DesignDesign IcMaskenlayoutdesignLayout DesignAnaloges Layout-designProgettazione UtenteDigital DesignLayout DesignerVlsi DesignDesign VlsiDesign Ic DigitalPhysical Design Ic Layout EngineerDesigngrafikSenior Masken-designerHardware DesignDesign ExperiencialMask Ic Layout DesignerDesigner Remoto