Basic Verilog questions, FSM, Synchronizers, Clock Domain Crossing, Sequence detectors, Clock divider circuits, FIFO, Async FIFO, Circuit to detect the number of 1's using adders and then using only combinational logic, Transpose a Matrix using C. I was asked to code on almost all of the topics mentioned above.
given a access stream of 5 different addresses and the first 4 keep on repeating after the 5th access , and a cache with just 4 blocks. how and which replacement policy will you use ?
Some system verilog Questions
how to triage a dns tunneling attack and attack on active directory
Why we need to hired u? Please convince us.
Preguntas técnicas sobre seguridad en general.
Have you had issues dealing with people coming back at you over the phone, if so, how did you calm the situation and handle that person?
What is gamma radiation
What is the difference between flip flop and latch
Basically covered VLSI basics, ASIC flow basics (each step) and scripting. Friendly chat for behavioral interview.
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