Senior Embedded Software Design Engineer Interview Questions

6,952 senior embedded software design engineer interview questions shared by candidates

critical path, how to reduce metastability, adding digital logic for synchronous design, hold/setup violations, adc stable data with clk, spi fpga different clk freq and how to get stable data into fpga clk. basic filter questions, basic passive/active topologies, nyquist, adc, and a design/black-box exercise. One of the interviewers, after he felt he asked me enough technical questions, asked me how I got this interview - quite rude.
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Embedded Engineer

Interviewed at Sandia National Laboratories

4.2
Sep 17, 2018

critical path, how to reduce metastability, adding digital logic for synchronous design, hold/setup violations, adc stable data with clk, spi fpga different clk freq and how to get stable data into fpga clk. basic filter questions, basic passive/active topologies, nyquist, adc, and a design/black-box exercise. One of the interviewers, after he felt he asked me enough technical questions, asked me how I got this interview - quite rude.

1) How to manipulate struct for optimality. 2) There was a for loop which has wrong statements and they told me to explain where is the wrong statements. 3) RAM/ROM Difference 4) What is semaphore, where we use it ? 5) What ıs ISR ? What is ISR Table mean ?
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Embedded Software Engineer

Interviewed at Analog Devices

4
Aug 27, 2025

1) How to manipulate struct for optimality. 2) There was a for loop which has wrong statements and they told me to explain where is the wrong statements. 3) RAM/ROM Difference 4) What is semaphore, where we use it ? 5) What ıs ISR ? What is ISR Table mean ?

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