What would be the most efficient way to detect overflow/underflow in FIFOs?
Hardware Developer Interview Questions
5,134 hardware developer interview questions shared by candidates
Mostly computer architecture, C/C++ , verilog for designing dff and digital logic design questions, compiler construction, and projects from my resume
verilog, clocl. mos, bjt, c
transistors and button controlled, simple electric circuit diagram and explain what it does
Shift registers for flipping certain incoming bits
Can you walk me through your final project and explain the main technical challenges you handled? In very much details. Block diagram and code.
Experience with hardware design and execution.
fibonacci inverilog,sequence detector in verilog ,bdc convertor in verilog ,crc error checker implementation in verilog
-Why Intel? -Sequential and Combinational Logic -Memory types -Registers, Flip-Flops, Latch -A specific situation and you have to give a solution. -Programming: OOP, Inheritance, Polymorphism, Encapsulation
FIFO explanation and verilog code for it
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