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NXP Semiconductors
4.0
Senior DfT Engineer
Caen
Excellent problem-solving, analytical, and communication skills. NXP CAEN is seeking a Senior DfT Engineer to contribute to the design and implementation of……
30d+
engineer jobs in Caen Caen jobs NXP Semiconductors jobs in Caen
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Siemens
4.1
Senior Application Engineer (DFT) - f/m/d
Châtillon
€114K - €247K (Employer provided)
Excellent verbal and written communication skills. Present, explain, and discuss deep technical aspects of Tessent products with senior technical managers and……
30d+
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NXP Semiconductors
4.0
Senior Digital Design Engineer
Caen
Knowledge of various communication protocols (e.g., I2C, SPI, UART, PCIe, Ethernet) is highly desirable. Excellent communication and teamwork abilities.…
30d+
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LIGENTEC
4.6
PCM Design Engineer
Corbeil-Essonnes
We are looking for a PCM Design Engineer to act as the technical bridge between architectural vision and manufacturable reality.…
5d
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Spore.Bio
5.0
Electronics Engineer
Paris
~5 years of experience designing electronic hardware for real products - not just prototypes that never left the lab.…
24h
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Cadence Design Systems
4.1
ATE Test Engineer Junior
Valbonne
Good communication and collaboration skills. This position targets a junior engineer (0–3 years of experience). Optimize test time, cost, and quality.…
2d
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Microchip Technology
3.6
Senior Test Engineer 2
Nantes
Minimum 5 years of experience in semiconductor test engineering, preferably with microcontrollers or mixed-signal ICs including analog and memory IPs.…
30d+
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Exotrail
3.7
Industrialisation Engineer F/M
Massy
Fluent in French and English (clear technical communication). Contribute to CAPEX/OPEX budget management for the department.…
30d+
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VITEC
3.7
Senior Hardware Engineer
Châtillon
€50K - €60K (Employer provided)
Easy Apply
Promote clear, factual and constructive technical communication. Share your expertise and mentor less experienced engineers;…
30d+
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Prophesee (France)
3.8
Digital IC Verification Engineer
Paris
Support analog team in setting up mixed-mode simulations. Language skill : fluent oral and written communication in English is mandatory.…
30d+
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Safran
3.9
Ingénieur·e Développement Banc de test F-H
Colombelles
Participer aux plans de productivité en étant force de proposition dans l'automatisation des tâches. Définir ou co-définir la solution technique.…
30d+
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Arteris
4.3
Staff Design Hardware Engineer / Ingénieur Staff Hardware Design H/F
Montigny
€65K - €75K (Employer provided)
Vous interviendrez à l’échelle système, sur des architectures de Network-on-Chip (NoC) hautement configurables. Support team members on technical challenges.…
30d+
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Mixel
4.4
Senior Manager, Embedded Memory
Montbonnot-Saint-Martin
Easy Apply
Excellent written and verbal communication skills, with the ability to present complex technical material to engineers, architects, and executives.…
2d
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Valeo
3.7
Responsable Groupe des Tests Industriels F/H
Créteil
Le/la Responsable Groupe des Tests Industriels au sein de l’équipe centralisée est un(e) expert(e) technique chargé(e) de définir, développer et déployer des……
15d
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Safran
3.9
Responsable Test et Informatique Industrielle F-H
Les Ulis
En tant que responsable T2I, vous aurez en charge le management de l'équipe en coordonnant les activités opérationnelles tout en développant les compétences de……
30d+
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NXP Semiconductors

4.0

Senior DfT Engineer

Caen

Is your resume a good match?

Use AI to find out how well the skills on your resume fit this job description.

NXP CAEN is seeking a Senior DfT Engineer to contribute to the design and implementation of Design-for-Test (DFT) solutions for complex System-on-Chip (SoC) products for Automotive Market, ensuring high test coverage and efficient manufacturing test flows.

Your Responsibilities:

Develop and implement DFT architectures and methodologies for digital and mixed-signal IPs and SoCs, including scan, JTAG, memory BIST, and logic BIST.
Perform DFT insertion and verification using industry-standard EDA tools.
Generate test patterns (e.g., ATPG, BIST patterns) and ensure their effectiveness in achieving target fault coverage.
Analyze test coverage reports and work with design teams to identify and resolve DFT-related design issues.
Collaborate with verification and test engineering teams to define and validate manufacturing test plans.
Debug silicon test failures and provide support for production ramp-up.
Contribute to the continuous improvement of DFT methodologies and flows.
Document DFT specifications, implementation details, and test plans.

Your Profile:

Master's degree in Electrical Engineering,

Proven experience (7+ years) in DFT design and verification for complex SoCs.
Strong understanding of various DFT techniques (Scan, JTAG, MBIST, LBIST, Boundary Scan).
Proficiency with industry-standard EDA tools for DFT insertion, ATPG, and fault simulation (e.g., Tessent, Synopsys DFT Compiler, Cadence Modus, Synopsys Z01X).
Solid understanding of digital design principles and ASIC/SoC design flow.

Experience with Security and Safety is a plus.
Experience with scripting languages (e.g., Tcl, Python, Perl) for automation.
Familiarity with semiconductor manufacturing test processes is a plus.
Excellent problem-solving, analytical, and communication skills.
Ability to work effectively in a collaborative team environment.
Fluency in English is required.

More information about NXP in France...

#LI-6710

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Working here doesn’t have to be a secret

4.0

Recommend to a friend
Approve of CEO
CEO: Kurt Sievers
915 Ratings

NXP Semiconductors

4.0

Senior DfT Engineer

Caen

NXP Semiconductors

4.0

Senior DfT Engineer

Caen

Is your resume a good match?

Use AI to find out how well the skills on your resume fit this job description.

Develop and implement DFT architectures and methodologies for digital and mixed-signal IPs and SoCs, including scan, JTAG, memory BIST, and logic BIST.
Perform DFT insertion and verification using industry-standard EDA tools.
Generate test patterns (e.g., ATPG, BIST patterns) and ensure their effectiveness in achieving target fault coverage.
Analyze test coverage reports and work with design teams to identify and resolve DFT-related design issues.
Collaborate with verification and test engineering teams to define and validate manufacturing test plans.
Debug silicon test failures and provide support for production ramp-up.
Contribute to the continuous improvement of DFT methodologies and flows.
Document DFT specifications, implementation details, and test plans.

Your Profile:

Master's degree in Electrical Engineering,

Proven experience (7+ years) in DFT design and verification for complex SoCs.
Strong understanding of various DFT techniques (Scan, JTAG, MBIST, LBIST, Boundary Scan).
Proficiency with industry-standard EDA tools for DFT insertion, ATPG, and fault simulation (e.g., Tessent, Synopsys DFT Compiler, Cadence Modus, Synopsys Z01X).
Solid understanding of digital design principles and ASIC/SoC design flow.

Experience with Security and Safety is a plus.
Experience with scripting languages (e.g., Tcl, Python, Perl) for automation.
Familiarity with semiconductor manufacturing test processes is a plus.
Excellent problem-solving, analytical, and communication skills.
Ability to work effectively in a collaborative team environment.
Fluency in English is required.

More information about NXP in France...

#LI-6710

See company reviews

Working here doesn’t have to be a secret

4.0

Recommend to a friend
Approve of CEO
CEO: Kurt Sievers
915 Ratings

Are you open to new opportunities?

17 Dft engineer jobs in France

Working here doesn’t have to be a secret

Working here doesn’t have to be a secret